Computer Architecture
A.Y. 2025/2026
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
Students are expected to master information encoding techniques, Boolean algebra, and key notions of logic circuits. They will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. Students will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Lesson period: Second four month period
Assessment methods: Esame
Assessment result: voto verbalizzato in trentesimi
Single course
This course can be attended as a single course.
Course syllabus and organization
Single session
Responsible
Lesson period
Second four month period
Course syllabus
BEHAVIOR OF THE COMPUTER
* Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
* Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
* Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
* Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
* I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
* The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
* The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
* Main architectural advances. Cache memories. Virtual memory. Pipelining.
* Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
* Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
* Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
* Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
* I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
* The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
* The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
* Main architectural advances. Cache memories. Virtual memory. Pipelining.
Prerequisites for admission
No prerequisites. Requested a knowledge of the basic concepts related to computer programming, and the ability of reading an English textbook.
Teaching methods
Videolectures available on the web platform dedicated to the Degree.
Teaching Resources
Notes and slides by the teacher, available on the course website.
Suggested material:
* P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
* V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Suggested material:
* P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
* V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Assessment methods and Criteria
The exam is a written test. The written test requires the solution of application and theoretical questions, having contents and difficulties similar to those shown in class. During the exam, the consultation of texts or notes is not allowed. The evaluation parameters include: knowledge of the course topics and logical reasoning skills. In oder to pass the exam the score must be equal or above 18/30. The maximum score is 30/30 with laude. The marks will be sent to students by official e-mails, from the verbalization system.
Professor(s)
Reception:
By appointment only
Dipartimento di Informatica - Via Celoria 18 - 20135 - Milano (MI)