Computer Architecture
A.Y. 2026/2027
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
Students are expected to master information encoding techniques, Boolean algebra, and key notions of logic circuits. They will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. Students will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Lesson period: Second semester
Assessment methods: Esame
Assessment result: voto verbalizzato in trentesimi
Single course
This course cannot be attended as a single course. Please check our list of single courses to find the ones available for enrolment.
Course syllabus and organization
Single session
Responsible
Lesson period
Second semester
Course syllabus
Part One — Information Representation and Logic Networks
Number systems and arithmetic operations. Base conversions: binary, decimal, and hexadecimal.
Information representation:
· integer representation: sign-and-magnitude, one's complement, two's complement;
· representation of real numbers: IEEE 754 standard in single and double precision;
· character representation: ASCII code.
Logic networks:
· logic gates: AND, OR, XOR, NOT;
· representation of logic circuits;
· Boolean algebra, Boolean expressions, and equivalences;
· truth tables;
· canonical forms, minterms, and maxterms;
· Karnaugh maps for completely and incompletely specified functions;
· cubes, implicants, prime and essential implicants;
· simplification of Boolean functions using Karnaugh maps.
Combinational circuits:
· decoders, encoders, multiplexers/selectors;
· Boolean adders.
Introduction to sequential circuits: SR and D latches.
Part Two — Computer Architecture and MIPS
Introduction to computer organization.
MIPS assembly:
· registers and memory;
· arithmetic operations;
· logical operations;
· multiplication and division;
· control instructions;
· simple programs in MIPS assembly language.
Machine language:
· representation of MIPS instructions;
· R, I, and J instruction formats.
Single-cycle CPU design:
· fetch stage;
· instruction decoding;
· execution of R-type instructions;
· execution of I-type instructions;
· execution of J-type instructions;
· datapath;
· control unit.
Number systems and arithmetic operations. Base conversions: binary, decimal, and hexadecimal.
Information representation:
· integer representation: sign-and-magnitude, one's complement, two's complement;
· representation of real numbers: IEEE 754 standard in single and double precision;
· character representation: ASCII code.
Logic networks:
· logic gates: AND, OR, XOR, NOT;
· representation of logic circuits;
· Boolean algebra, Boolean expressions, and equivalences;
· truth tables;
· canonical forms, minterms, and maxterms;
· Karnaugh maps for completely and incompletely specified functions;
· cubes, implicants, prime and essential implicants;
· simplification of Boolean functions using Karnaugh maps.
Combinational circuits:
· decoders, encoders, multiplexers/selectors;
· Boolean adders.
Introduction to sequential circuits: SR and D latches.
Part Two — Computer Architecture and MIPS
Introduction to computer organization.
MIPS assembly:
· registers and memory;
· arithmetic operations;
· logical operations;
· multiplication and division;
· control instructions;
· simple programs in MIPS assembly language.
Machine language:
· representation of MIPS instructions;
· R, I, and J instruction formats.
Single-cycle CPU design:
· fetch stage;
· instruction decoding;
· execution of R-type instructions;
· execution of I-type instructions;
· execution of J-type instructions;
· datapath;
· control unit.
Prerequisites for admission
No requirement
Teaching methods
Traditional lectures. A subset of lectures will focus exclusively on exercises.
Teaching Resources
- M. Morris Mano, C.R. Kime, T. Martin, Logic and Computer Design Fundamentals, Pearson.
- D.A. Patterson, J.L. Hennessy, Computer Organization and Design: The Hardware/Software, Elsevier.
- Slides and other materials available on the MyAriel course website.
- D.A. Patterson, J.L. Hennessy, Computer Organization and Design: The Hardware/Software, Elsevier.
- Slides and other materials available on the MyAriel course website.
Assessment methods and Criteria
The exam is a written test lasting about an hour and a half. The written test requires the solution of application and theoretical exercises, having contents and difficulties similar to those shown in class. During the exam, the consultation of texts or notes is not allowed. The evaluation parameters include: knowledge of the course topics and logical reasoning skills. In oder to pass the exam the score must be equal or above 18/30. The maximum score is 30/30 with laude. The marks will be sent to students by official e-mails, from the verbalization system.
INFO-01/A - Informatics - University credits: 6
Lessons: 48 hours
Professor:
Ciriani Valentina
Shifts:
Turno
Professor:
Ciriani ValentinaProfessor(s)
Reception:
By appointment only
Dipartimento di Informatica - Via Celoria 18 - 20135 - Milano (MI)