Computer architecture
A.Y. 2019/2020
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
The student will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. The student will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Lesson period: Second four month period (In case of multiple editions, please check the period, as it may vary)
Assessment methods: Esame
Assessment result: voto verbalizzato in trentesimi
Course syllabus and organization
Single session
Responsible
Course syllabus
BEHAVIOR OF THE COMPUTER
· Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
· Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
· Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
· Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
· I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
· The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
· The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
· Main architectural advances. Cache memories. Virtual memory. Pipelining.
· Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
· Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
· Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
· Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
· I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
· The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
· The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
· Main architectural advances. Cache memories. Virtual memory. Pipelining.
Prerequisites for admission
Nessun prerequisito. Si richiede una conoscenza dei concetti base di programmazione e la capacità di leggere un testo in inglese.
Teaching methods
Videolectures available on the degree web platform.
Teaching Resources
Notes and slides by the teacher, available on the course website.
Suggested material:
· P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
· V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Suggested material:
· P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
· V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Assessment methods and Criteria
The exam is constituted by a written test (requiring solution of application exercises and answer to theoretical questions) evaluated in thirtieths, and by the coding (in computer lab) of a program written in LC2 Assembly language that - if correct - may lead to a maximum increment of 2 thertieths of the grade obtained in the written test.
Educational website(s)
Professor(s)