Computer Architecture
A.Y. 2020/2021
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
Students are expected to master information encoding techniques, Boolean algebra, and key notions of logic circuits. They will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. Students will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Lesson period: First semester
Assessment methods: Esame
Assessment result: voto verbalizzato in trentesimi
Single course
This course cannot be attended as a single course. Please check our list of single courses to find the ones available for enrolment.
Course syllabus and organization
Single session
Responsible
Lesson period
First semester
DIDACTIC METHODS
Asynchronous, short duration lectures (videolectures constituted by the recording of the teacher's desktop with audio explanations) will be made available, covering topics of each week of the course. Lectures planned by the class schedule will be used to revise and deepen what proposed asynchronously. They will be carried on using the Zoom platform, and recorded to allow synchronous as well as asynchronous fruition by students not present in classrooms.
Rules and criteria for participating to lectures in presence, requiring reservation through a suitable app, will be published in due time on the Ariel pages of the course as well as all the above materials and any notice related to Covid-19 regulation changes.
REFERENCE MATERIALS
Course program and reference materials will not change.
LEARNING VERIFICATION AND EVALUATION CRITERIA
As in the past, the exams in presence will consist of
* a 60-minutes written test, with 3 open-answer questions aiming at evaluating the understanding and the personal rethinking of all topics presented in lectures, as well as all logical connections among the various, technological, functional and implementation dependent aspects of the computer architecture;
* a 60-minutes practical test in a PC lab, requiring implementation and testing of a program written in LC2 Assembly language, to verify the understanding of the machine-level behavior of the computer.
Online exams - if needed - will be carried on using the exam.net platform, with the rules already published in the unimi Web portal. The written test will have the same structure of the version in presence, while the practical test will have a 30-minutes reduced time, because the access to software tools necessary to translate and test LC2 Assembly language programs are not accessible under the exam.net platform. Evaluation will then be made only on the basis of the program text submitted by the student.
Asynchronous, short duration lectures (videolectures constituted by the recording of the teacher's desktop with audio explanations) will be made available, covering topics of each week of the course. Lectures planned by the class schedule will be used to revise and deepen what proposed asynchronously. They will be carried on using the Zoom platform, and recorded to allow synchronous as well as asynchronous fruition by students not present in classrooms.
Rules and criteria for participating to lectures in presence, requiring reservation through a suitable app, will be published in due time on the Ariel pages of the course as well as all the above materials and any notice related to Covid-19 regulation changes.
REFERENCE MATERIALS
Course program and reference materials will not change.
LEARNING VERIFICATION AND EVALUATION CRITERIA
As in the past, the exams in presence will consist of
* a 60-minutes written test, with 3 open-answer questions aiming at evaluating the understanding and the personal rethinking of all topics presented in lectures, as well as all logical connections among the various, technological, functional and implementation dependent aspects of the computer architecture;
* a 60-minutes practical test in a PC lab, requiring implementation and testing of a program written in LC2 Assembly language, to verify the understanding of the machine-level behavior of the computer.
Online exams - if needed - will be carried on using the exam.net platform, with the rules already published in the unimi Web portal. The written test will have the same structure of the version in presence, while the practical test will have a 30-minutes reduced time, because the access to software tools necessary to translate and test LC2 Assembly language programs are not accessible under the exam.net platform. Evaluation will then be made only on the basis of the program text submitted by the student.
Course syllabus
BEHAVIOR OF THE COMPUTER
· Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
· Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
· Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
· Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
· I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
· The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
· The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
· Main architectural advances. Cache memories. Virtual memory. Pipelining.
· Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
· Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
· Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
· Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
· I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
· The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
· The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
· Main architectural advances. Cache memories. Virtual memory. Pipelining.
Prerequisites for admission
No prerequisites. It is requested a knowledge of the basic concepts related to computer programming, and the ability of reading an English textbook.
Teaching methods
Front lectures.
Teaching Resources
Notes and slides by the teacher, available on the course website.
Suggested material:
· P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
· V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Suggested material:
· P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
· V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Assessment methods and Criteria
The exam is constituted by a written test (requiring solution of application exercises and answer to theoretical questions) evaluated in thirtieths, and by the coding (in computer lab) of a program written in LC2 Assembly language that - if correct - may lead to a maximum increment of 2 thertieths of the grade obtained in the written test.
INF/01 - INFORMATICS - University credits: 6
Laboratories: 24 hours
Lessons: 36 hours
Lessons: 36 hours
Professor:
Scarabottolo Nello
Shifts:
Professor:
Scarabottolo Nello
Lab. Turno A
Professor:
Scarabottolo NelloLab. Turno B
Professor:
Scarabottolo NelloLab. parte introduttiva
Professor:
Scarabottolo NelloProfessor(s)