Computer Architecture
A.Y. 2023/2024
Learning objectives
The course aims at introducing basic concepts of hardware and firmware architectures of computing systems, starting from digital circuit fundamentals up to the description of behavior and structure of the main parts of a computing system and its programming in machine language.
Expected learning outcomes
The student will have to demonstrate understanding of role and behavior of basic elements related to structure and functioning of a computer. The student will have also to be able to translate simple algorithms into the machine language of the reference processor adopted in the course.
Lesson period: Second four month period
Assessment methods: Esame
Assessment result: voto verbalizzato in trentesimi
Single course
This course can be attended as a single course.
Course syllabus and organization
Single session
Responsible
Lesson period
Second four month period
Course syllabus
BEHAVIOR OF THE COMPUTER
* Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
* Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
* Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
* Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
* I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
* The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
* The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
* Main architectural advances. Cache memories. Virtual memory. Pipelining.
* Reference architecture. Von Neumann machine. Functional structure of the main parts of the machine.
* Machine language. The Assembly language. Exercises.
COMPUTER ARCHITECTURE
* Functional principles of digital computing systems. Digital coding of information. Switching logic, logic gates, bistables. Combinational and sequential circuits.
* Main parts of the microcomputer architecture. Memory circuits. Memory technologies (ROM, SRAM, DRAM).
* I/O (Input/Output) peripherals architecture. Types and characteristics of I/O devices. The bus: structure and interconnection schemes. Software handling of I/O.
* The CPU: Data Path design. Circuits performing Arithmetic operations. ALU model design.
* The CPU: Control Path design. Control Unit design. Wired and microprogrammed control units.
* Main architectural advances. Cache memories. Virtual memory. Pipelining.
Prerequisites for admission
No prerequisites. Requested a knowledge of the basic concepts related to computer programming, and the ability of reading an English textbook.
Teaching methods
Videolectures available on the web platform dedicated to the Degree.
Teaching Resources
Notes and slides by the teacher, available on the Ariel course website.
Suggested material:
* P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
* V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Suggested material:
* P.Patel, Y.Patt: Introduction to computing systems: from bits and gates to C and beyond, McGraw Hill.
* V.C.Hamacher, Z.G.Vranesic, S.G.Zaky: Computer Organization, McGraw Hill.
Assessment methods and Criteria
The exam consists in
* a 60-minutes written test (evaluated in thirtieths) without possibility of consulting books or other didactic supports, with 3 open-answer questions aiming at evaluating the understanding and the personal rethinking of all topics presented in lectures, as well as all logical connections among the various, technological, functional and implementation dependent aspects of the computer architecture;
* a 60-minutes practical test in a PC lab (that - if correct - may lead to a maximum increment of 2 thirtieths of the grade obtained in the written test) requiring implementation and testing of a program written in LC2 Assembly language, to verify the understanding of the machine-level behavior of the computer.
Results will be publiched on the teacher Ariel course website.
* a 60-minutes written test (evaluated in thirtieths) without possibility of consulting books or other didactic supports, with 3 open-answer questions aiming at evaluating the understanding and the personal rethinking of all topics presented in lectures, as well as all logical connections among the various, technological, functional and implementation dependent aspects of the computer architecture;
* a 60-minutes practical test in a PC lab (that - if correct - may lead to a maximum increment of 2 thirtieths of the grade obtained in the written test) requiring implementation and testing of a program written in LC2 Assembly language, to verify the understanding of the machine-level behavior of the computer.
Results will be publiched on the teacher Ariel course website.
Professor(s)