Computer Architecture I

A.Y. 2018/2019
6
Max ECTS
60
Overall hours
SSD
INF/01
Language
Italian
Learning objectives
Fornire le conoscenze di base della logica digitale. Acquisire la capacità di analizzare un problema e generare una soluzione adeguata.
Expected learning outcomes
Undefined
Single course

This course cannot be attended as a single course. Please check our list of single courses to find the ones available for enrolment.

Course syllabus and organization

Milan

Lesson period
First semester
ATTENDING STUDENTS
Course syllabus
Introduction
The reference architecture. The execution cycle of an instruction. History of the computer. How to code the information. Binary representation of digital numbers.

Combinatorial logic and algebra
Operations on binary numbers. The fundamental operations: addition and subtraction. Binary representation of floating point numbers. Combinatorial logic. Boole algebra: variables and operators. Circuital implementation (logical gates). From circuit to function. Universal gates. From functions to circuits. The truth tables. From truth tables to circuits: the first canonic form. Implementation of logical functions in PLAs or ROMs. Noticible combinatorial circuits. Exercises.

Arithmetic-logical units
Adder. The carry problem. Hardware multipliers. Design of an ALU with two stages. Adder on 32 bits. Support to the comparison operations. Carry ahead. Introduction to firmware. Firmware circuits for multiplication and division. Arithmetics and adders for floating point numbers.

Sequential logic
Temporization of boolean circuits. Sequential circuits. Transition tables. Eccitation tables. The latch SC and the latch D. Registers and the Register file. Temporization problems. The flip-flops. Finite state machines. From specifications to the project. The state transition graph and the state transition table. Coding the STT. Synthesis of the circuit of a finite state machine. Examples.

Introduction to CPU
A simple CPU and its control unit. Instruction format. Introduction on assembly language and machine code.

Design and realization of logical circuits through a simulator.
NON-ATTENDING STUDENTS
Course syllabus
Introduction
The reference architecture. The execution cycle of an instruction. History of the computer. How to code the information. Binary representation of digital numbers.

Combinatorial logic and algebra
Operations on binary numbers. The fundamental operations: addition and subtraction. Binary representation of floating point numbers. Combinatorial logic. Boole algebra: variables and operators. Circuital implementation (logical gates). From circuit to function. Universal gates. From functions to circuits. The truth tables. From truth tables to circuits: the first canonic form. Implementation of logical functions in PLAs or ROMs. Noticible combinatorial circuits. Exercises.

Arithmetic-logical units
Adder. The carry problem. Hardware multipliers. Design of an ALU with two stages. Adder on 32 bits. Support to the comparison operations. Carry ahead. Introduction to firmware. Firmware circuits for multiplication and division. Arithmetics and adders for floating point numbers.

Sequential logic
Temporization of boolean circuits. Sequential circuits. Transition tables. Eccitation tables. The latch SC and the latch D. Registers and the Register file. Temporization problems. The flip-flops. Finite state machines. From specifications to the project. The state transition graph and the state transition table. Coding the STT. Synthesis of the circuit of a finite state machine. Examples.

Introduction to CPU
A simple CPU and its control unit. Instruction format. Introduction on assembly language and machine code.

Design and realization of logical circuits through a simulator.
INF/01 - INFORMATICS - University credits: 6
Laboratories: 24 hours
Lessons: 36 hours
Shifts:
Turno A
Professor: Basilico Nicola
Turno B
Professor: Trucco Gabriella